论文标题
零偏置功率检测器电路基于MOS $ _2 $ FIELD效应晶体管在晶圆尺度柔性基板上
Zero Bias Power Detector Circuits based on MoS$_2$ Field Effect Transistors on Wafer-Scale Flexible Substrates
论文作者
论文摘要
我们演示了基于二维MOS $ _2 $ field效应晶体管（FET）的晶圆尺度，零偏置功率检测器的设计，制造和表征。 MOS $ _2 $ FET是使用8 $ $ m厚的聚酰亚胺膜上的晶圆尺度工艺制造的，该过程原则上是柔性底物。分析了两种CVD-MOS $ _2 $表的表演，它们具有不同的过程，并显示出不同的厚度，并根据单个设备的制造和表征步骤比较了电路水平。功率探测器原型利用了设备截止频率上方的晶体管的非线性。提出的检测器是根据测量结果设计的，采用晶体管模型设计。制造的电路在12至18 GHz之间的KU波段工作，在单层MOS2的情况下，在18 GHz的电压响应性为45 V/W，而在Molederayer MOS $ _2 $的情况下，在16 GHz的情况下，电压响应性在16 GHz的情况下，均具有16 GHz的响应，这两种情况下都达到了DC BIAS，均可达到MOS $ _2 $。它们是迄今为止在柔性基材上制造的最佳性能探测器。测得的动态范围超过30 dB的表现优于其他半导体技术，例如硅互补金属氧化物半导体（CMOS）电路和GAAS Schottky Diodes。
We demonstrate the design, fabrication, and characterization of wafer-scale, zero-bias power detectors based on two-dimensional MoS$_2$ field effect transistors (FETs). The MoS$_2$ FETs are fabricated using a wafer-scale process on 8 $μ$m thick polyimide film, which in principle serves as flexible substrate. The performances of two CVD-MoS$_2$ sheets, grown with different processes and showing different thicknesses, are analyzed and compared from the single device fabrication and characterization steps to the circuit level. The power detector prototypes exploit the nonlinearity of the transistors above the cut-off frequency of the devices. The proposed detectors are designed employing a transistor model based on measurement results. The fabricated circuits operate in Ku-band between 12 and 18 GHz, with a demonstrated voltage responsivity of 45 V/W at 18 GHz in the case of monolayer MoS2 and 104 V/W at 16 GHz in the case of multilayer MoS$_2$, both achieved without applied DC bias. They are the best performing power detectors fabricated on flexible substrate reported to date. The measured dynamic range exceeds 30 dB outperforming other semiconductor technologies like silicon complementary metal oxide semiconductor (CMOS) circuits and GaAs Schottky diodes.
