论文标题
具有调节的被动神经元和位线重量映射的电阻内存计算核心中的8位
An 8-bit In Resistive Memory Computing Core with Regulated Passive Neuron and Bit Line Weight Mapping
论文作者
论文摘要
人工智能（AI）和物联网（IoT）的快速发展增加了使用低功率和相对较高的处理速度设备的边缘计算的需求。基于新兴的非易失性记忆（NVM）基于内存计算（CIM）方案在减少AI计算的功耗方面具有巨大的潜力。但是，非挥发记忆的设备不一致可能会显着退化神经网络的性能。在本文中，我们建议基于低功率电阻RAM（RRAM）的CIM核心，不仅可以实现高计算效率，而且还可以通过位调节器和位线重量映射算法极大地提高鲁棒性。仿真结果表明，我们提出的8位CIM核心的功耗仅为3.61MW（256*256）。 CIM芯的SFDR和SNDR分别达到59.13 dB和46.13 dB。提出的位线重量映射方案在Imagenet上，Alexnet和VGG16在Imagenet大规模视觉识别竞赛（ILSVRC 2012）上分别以8位模式提高了TOP-1的准确性和3.47％。
The rapid development of Artificial Intelligence (AI) and Internet of Things (IoT) increases the requirement for edge computing with low power and relatively high processing speed devices. The Computing-In-Memory(CIM) schemes based on emerging resistive Non-Volatile Memory(NVM) show great potential in reducing the power consumption for AI computing. However, the device inconsistency of the non-volatile memory may significantly degenerate the performance of the neural network. In this paper, we propose a low power Resistive RAM (RRAM) based CIM core to not only achieve high computing efficiency but also greatly enhance the robustness by bit line regulator and bit line weight mapping algorithm. The simulation results show that the power consumption of our proposed 8-bit CIM core is only 3.61mW (256*256). The SFDR and SNDR of the CIM core achieve 59.13 dB and 46.13 dB, respectively. The proposed bit line weight mapping scheme improves the top-1 accuracy by 2.46% and 3.47% for AlexNet and VGG16 on ImageNet Large Scale Visual Recognition Competition 2012 (ILSVRC 2012) in 8-bit mode, respectively.
