论文标题
倒数电路：理论与建筑
Topolectric circuits: Theory and construction
论文作者
论文摘要
我们强调了一种通用理论，可以在电气LC电路中设计任意的遗传学紧密结合晶格模型，在该电路中，晶格位点被电源替换为电气节点，并由电容器和电感器连接到其邻居和地面。特别是，通过用$ n $子节点补充每个节点，当前和电压的阶段是\ emph {unity}的$ n $不同的根，可以原则上可以通过\ emph {shift emph {shift emph {shift operapor coupling}来实现站点或节点之间的任意跳跃幅度。然后，实施了该一般原理，以在电路中构建众多拓扑模型，即\ emph {topolectric Circuits}，当电路调谐到谐振频率时，强大的零能源拓扑边界模式通过大的边界阻抗表现出来。我们电路构造的简单性是基于以下事实：边界模式的存在仅依赖于进入哈密顿的相应Hermitian矩阵的Clifford代数，而不是其特定的表示。反过来，这使我们能够通过仅由两个子节点组成的节点来实现广泛的拓扑模型。 We anchor these outcomes from the numerical computation of the on-resonance impedance in circuit realizations of first-order ($m=1$), such as Chern and quantum spin Hall insulators, and second- ($m=2$) and third- ($m=3$) order topological insulators in different dimensions, featuring sharp localization on boundaries of codimensionality $d_c=m$.最后，我们订阅了\ emph {堆叠的倒色电路}构造，以分别显示表面和铰链局部阻抗，分别显示出三维WEYL，NODAL-LOOP，nodal-loop，Quadrupolar Dirac和Weyl Semimetals。
We highlight a general theory to engineer arbitrary Hermitian tight-binding lattice models in electrical LC circuits, where the lattice sites are replaced by the electrical nodes, connected to its neighbors and to the ground by capacitors and inductors. In particular, by supplementing each node with $n$ subnodes, where the phases of the current and voltage are the $n$ distinct roots of \emph{unity}, one can in principle realize arbitrary hopping amplitude between the sites or nodes via the \emph{shift capacitor coupling} between them. This general principle is then implemented to construct a plethora of topological models in electrical circuits, \emph{topolectric circuits}, where the robust zero-energy topological boundary modes manifest through a large boundary impedance, when the circuit is tuned to the resonance frequency. The simplicity of our circuit constructions is based on the fact that the existence of the boundary modes relies only on the Clifford algebra of the corresponding Hermitian matrices entering the Hamiltonian and not on their particular representation. This in turn enables us to implement a wide class of topological models through rather simple topolectric circuits with nodes consisting of only two subnodes. We anchor these outcomes from the numerical computation of the on-resonance impedance in circuit realizations of first-order ($m=1$), such as Chern and quantum spin Hall insulators, and second- ($m=2$) and third- ($m=3$) order topological insulators in different dimensions, featuring sharp localization on boundaries of codimensionality $d_c=m$. Finally, we subscribe to the \emph{stacked topolectric circuit} construction to engineer three-dimensional Weyl, nodal-loop, quadrupolar Dirac and Weyl semimetals, respectively displaying surface and hinge localized impedance.
