论文标题
基于Majorana Qubit的表面代码设计的优化
Optimization of the surface code design for Majorana-based qubits
论文作者
论文摘要
表面代码是一个突出的拓扑误差校正代码,表现出高断层精度阈值。使用表面代码将Qubits放置在平面网格上的常规方案进行误差校正,并假设具有最近邻个Ancilla Qubits的数据量位之间的天然CNOT门。 在这里,我们使用$ \ textit {holly} $ pauli测量在单量子位和成对的最近的邻居Qubits上介绍表面代码错误校正方案。特别是,我们提供了几种Qubit布局,可在Qubit开销,电路深度和连接程度之间提供良好的权衡。我们还开发了最小化综合征提取的测量序列,从而降低了逻辑错误率并提高了断层容忍度阈值。 我们的工作适用于用Majorana零模式实现的拓扑保护量子,以及类似的系统,在这些系统中,多Qubit Pauli测量而不是CNOT大门是本机操作。
The surface code is a prominent topological error-correcting code exhibiting high fault-tolerance accuracy thresholds. Conventional schemes for error correction with the surface code place qubits on a planar grid and assume native CNOT gates between the data qubits with nearest-neighbor ancilla qubits. Here, we present surface code error-correction schemes using $\textit{only}$ Pauli measurements on single qubits and on pairs of nearest-neighbor qubits. In particular, we provide several qubit layouts that offer favorable trade-offs between qubit overhead, circuit depth and connectivity degree. We also develop minimized measurement sequences for syndrome extraction, enabling reduced logical error rates and improved fault-tolerance thresholds. Our work applies to topologically protected qubits realized with Majorana zero modes and to similar systems in which multi-qubit Pauli measurements rather than CNOT gates are the native operations.